(1) Field of the Invention
The present invention relates to the fabrication of integrated circuit devices on semiconductor substrates, and more particularly to a structure and fabrication method for making polysilicon resistors with stable high resistance for mixed signal (analog/digital) integrated circuits. A silicide extension on the polysilicon resistor provides 100 percent metal shielding that prevents hydrogen ions from permeating the resistor, thereby providing more stable high value resistors.
(2) Description of the Prior Art
Many integrated circuits utilize both analog and digital circuits on the same chip. CMOS circuits provide low voltage, low power consumption for digital applications, while bipolar transistors require higher voltage and provide high current gain capabilities. These bipolar/complementary-metal-oxide-silicon (BiCMOS) circuits for ULSI with minimum feature sizes, (e. g., less than 025 um) require high value resistors that occupy the minimal surface on the chip. Polysilicon resistors formed on the field oxide (FOX) are preferred over diffused resistors in the silicon substrate because the diffused resistors require junction isolation with high capacitance that increases the RC time constant and degrades circuit performance. Also, the polysilicon resistor can be integrated into the Field effect transistor (FET) process without significantly increasing the process complexity.
Unfortunately, after forming the polysilicon resistor and during subsequent processing to form the multilevels of metal interconnections, hydrogen can rapidly diffuse through the interlevel and intermetal dielectric insulating layers into the resistor. The hydrogen intrusion can then fill the trapping states at the polysilicon grain boundary, thereby causing reduction and fluctuation in the resistance. One method of avoiding this problem by the prior art is to use a metal shield, formed from the first level of metal interconnections, over the resistor to shield the resistor from the diffusing hydrogen. This is best understood with reference to the schematic top view in FIG. 1 and the cross-sectional view in FIG. 2. FIGS. 1 and 2 show a conventional polysilicon resistor 16, formed from a patterned polysilicon layer, over a field oxide 12. An interlevel dielectric layer 22 is deposited over the resistor 16, and contact holes 23 are etched and metal plugs 24 are formed in the contact holes at both ends of the resistor. The first level of metal interconnections 26 is formed to make electrical contact to the resistor over the metal plugs. In this conventional method, the metal 26 is also patterned to extend over the body of the resistor to prevent hydrogen diffusion into the resistor 16 during subsequent processing, as shown in the top view of FIG. 1. However, it is necessary to provide a minimum spacing S between the metal contacting the plugs 24 to prevent shorting between the contacts at both ends of the resistor. This provides a path for hydrogen diffusion through the interlevel dielectric layer 22 into the resistor. Therefore there is still a need to improve upon the prior art to further minimize this hydrogen diffusion into the resistor.
Several methods of forming high-resistive elements on an integrated circuit are described in the literature. In U.S. Pat. No. 5,462,894 to Spinner et al., a polysilicon layer is oxidized to form a thin polysilicon resistor having high resistance, and doped or silicide contacts at both ends of the resistor. In U.S. Pat. No. 5,356,826 to Natsume, and in U.S. Pat. No. 5,618,749 to Takahashi et al. methods are shown for concurrently forming a polysilicon resistor, a capacitor, and a MOSFET. U.S. Pat. No. 5,135,882 to Karniewicz teaches a method for making high-value internodal coupling resistors for SRAM formed from a second polysilicon layer and having silicide contacts. U.S. Pat. No. 5,168,076 to Godinho et al., and U.S. Pat. No. 5,705,436 to Chin et al. describe methods for making polysilicon load resistors for SRAM. U.S. Pat. No. 4,968,645 to Baldi et al. describes a method for forming an intermediate connecting level composed of polycide and polysilicon portions for forming low-resistive interconnections and resistors on an integrated circuit.
However, there is still a need in the semiconductor industry to provide stable, high-value polysilicon resistors that are immune from hydrogen intrusion during processing.